IBM isn't the only place to use a different term for the
"page translation cache".
> Making it external to
> the CPU doesn't make it a page table, it only makes it slower (but in all
> fairness it also makes it bigger, which is obviously why they do it).
It makes it slower than an on-chip TLB, but it's still likely to be
faster than a TLB miss (I assume they have an on-chip TLB as well).