Re: Memory Management - BSD vs Linux
Systemkennung Linux (linux@mailhost.uni-koblenz.de)
Wed, 13 Aug 1997 05:45:38 +0200 (MET DST)
> > "Hash table" just happens to be the IBM implementation for the TLB.
>
> IBM isn't the only place to use a different term for the
> "page translation cache".
>
> > Making it external to
> > the CPU doesn't make it a page table, it only makes it slower (but in all
> > fairness it also makes it bigger, which is obviously why they do it).
>
> It makes it slower than an on-chip TLB, but it's still likely to be
> faster than a TLB miss (I assume they have an on-chip TLB as well).
Hash tables tend to scatter the data throughout the memory. With today's
memory subsystems it's not uncommon that you take 20 or 30 or even many
more cycles penalty for a single cache miss. On the other hand loading
a new page table entry from the tree structure can be implemented in
software in around 20 cycles depending of the architecture. So you might
easily loose more than you win. See arch/mips/kernel/head.S. This is an
over the thumb guess with knowing the actual PPC details, but so far I
don't think hash tables are a too good idea.
Ralf