Re: patch for 2.1.55 pre-1 minix/sysv/affs

David S. Miller (davem@jenolan.rutgers.edu)
Wed, 10 Sep 1997 19:27:04 -0400


Date: Wed, 10 Sep 1997 10:34:07 +0200 (MET DST)
From: R.E.Wolff@BitWizard.nl (Rogier Wolff)

I hate this type of code, but for better cache-use, it is the
faster way to write the code.....

Would someone be interested in implementing

#pragma rarely_used

which would go inside an "if" statement, and cause gcc to do
exactly what Bill is doing up there by hand....

EGCS (and hopefully gcc-2.8.x when released) has such a trick,
it's implemented via attributes so you'd go:

if(condition1) __attribute__((likely)) {
} else if(condition2) __attribute__((unlikely)) {
}

or something like that.

It has only two real gains though:

1) In the case where a GCC port has a true 'return' RTL instruction
pattern (ie. lacks epilogue's and prologue's), gcc can perform
code motion based upon the likelyness of conditionals. I think
this is the case on Intel, and this is what you are proposing
gcc should be capable of.

2) On architectures with branch prediction settings in branch
instructions, the port backend of GCC can set that prediction
bit in the instruction depending upon the attribute clause
the conditional was given by the programms. To a certain extent
prediction is done by gcc itself when not explicit attribute is
given. We are using this to get proper branch prediction bit
settings in the sparc64 port, we mainly get this because we needed
to use a gcc snapshot to get an even working compiler, so the
prediction mechanisms sort of came "for free".

Later,
David "Sparc" Miller
davem@caip.rutgers.edu