> > fault: divide by zero, debugging traps, NMI, into, bound and illegal
> > instruction, all others starting at interrupt 7 which is the quite critical
> > (FPU context switches) should not experience any performance degradation.
>
> Yep
So am I correct in understanding that intel will probably escape a
multibillion dollar replacement program because the illegal
instruction interupt number is lower than the FPU one?
Jan