Re: [hardcntr] Harware counter per process support

David Mentre (David.Mentre@irisa.fr)
27 Nov 1997 18:38:55 +0100


And a point I forgot:

David Mentre <David.Mentre@irisa.fr> writes:

> 2. Regarding implementation

d. More control on the bits enabled in control register (mainly pin and
apic control). (note from Dean Gaudet). But I would let the user to
set/unset the enable bit, as he need to decide when to monitor events
(in a specific routine for example).

d.