> DMA transactions are *exactly* the same speed/timing as PIO transactions
> (thanks to the same cycle time of 120ns, plus pipelining/prefetch in the
> chipsets for the PIO transfers). Except for Ultra33 DMA, which *does*
> include 32-bit CRC checking (far superior to parity).
Could the Linux IDE guy explain to a Linux SCSI guy who does
not want to die in ignorance, in which this 32-bit CRC is so
superior to parity ? ;-)
> mlord@pobox.com
> The Linux IDE guy
Gerard.