Re: Mmap device performance
root (root@uni-koblenz.de)
Fri, 12 Dec 1997 10:32:18 +0100
On Fri, Dec 12, 1997 at 09:25:47AM +0100, Jes Degn Soerensen wrote:
> >>>>> "ralf" == ralf <ralf@uni-koblenz.de> writes:
>
> ralf> I'll have to add a syscall cachectl() make the caching of a
> ralf> memory area controlable for MIPS. Will that one also be useful
> ralf> for Intel (or other architectures)?
>
> I can see the potential use for this for the m68k port. Currently we
> set the caching inside the kernel on the frame buffer memory, but who
> knows we might need it in userland at some point. We also have a
> sys_cacheflush() in order for the glibc trampoline stuff to work.
Yes, MIPS also has cacheflush - and how Roman explained to me it has
different arguments than the Linux/68k cacheflush. Btw, cacheflush
polutes the namespace, newer MIPS systems now have the syscall
_flush_cache() with similar arguments ...
Ralf