> > Well, one bad shot into configuration register at init time is
> > probably just enough.
>
> SMP init goes this way:
>
> - we do nonintrusive BIOS signature search to find the 'mp
> configuration table'
>
> - we carefully probe the local APICs and fire up all CPUs
>
> - _then_ we go and configure the IO-APIC.
>
> Cyrix based boards should already bail at in the first step, i pretty much
> doubt they can ever make it to step 3.
Can't you see that from the boot-messages ? (I sent them a few days ago.)
The 6x86 is configured using the processor ports 0x22 and 0x23. Mike Jagdis
told me, that the APIC on Intels do use these registers. So, I consider this
to be the most probable candidate for the problem.
I remember, that cyrix and AMD agreed on an own multiprocessor similar to
APIC: Open-PIC. However, there've never been boards supporting that, AFAIK.
May the SMP code misinterprets something here ?
> so it must be something else, not the IO-APIC. It could be scheduling
> irregularity (APM and Cyrix?)?
APM is enabled (also in the SMP kernel, because I check the # of porcessors
before disabling it), but
- it is also in UP kernels and doesn't cause any slowdown there
- when the kernel does it's initial bogomips measurement, there's not much
scheduling out there.
I'm gonna compile 2190.SMP and 2033.SMP to test what happens there.
-- Kurt Garloff, Dortmund <K.Garloff@ping.de> PGP key on http://student.physik.uni-dortmund.de/homepages/garloff- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu