Re: Dual PCI bus support

David W. Hankins (dhankins@mercenary.net)
Thu, 30 Apr 1998 19:49:01 -0400


Traffic from Martin Mares (Fri, May 01, 1998 at 12:52:43AM +0200):
> Can you test the following patch? It should make the secondary PCI bus
> happy. In case it helps, please include output of 'lspci -vvx' as well.

Verified functional, /proc/bus/pci and /proc/pci weren't there until I
repatched on 2.1.98. I think the only substantial difference was my
neglect to turn SMP back on in 2.1.97. So, moving to 2.1.98 and turning
SMP back on, I can get lspci -vvx output again.

00:02.0 Non-VGA unclassified device: Intel Corporation 82375EB (rev 05)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 248 set
00: 86 80 82 04 07 00 00 02 05 00 00 00 00 f8 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:03.0 IDE interface: CMD Technology Inc PCI0646 (rev 01) (prog-if 8a)
Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 14
Region 0: I/O ports at 01f0
Region 1: I/O ports at 03f4
Region 2: I/O ports at 0170
Region 3: I/O ports at 0374
Region 4: I/O ports at 6f3fa5d0
00: 95 10 46 06 01 00 80 02 01 8a 01 01 00 20 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: d1 a5 3f 6f 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 0e 01 02 04

00:05.0 VGA compatible controller: ATI Technologies Inc 215GT [Mach64 GT] (rev 41)
Subsystem ID: 1002:4754
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 8 min, 32 set, cache line size 08
Region 0: Memory at fd000000 (32-bit, non-prefetchable)
Region 1: I/O ports at d800
Region 2: Memory at feaff000 (32-bit, non-prefetchable)
00: 02 10 54 47 87 00 80 02 41 00 00 03 08 20 00 00
10: 00 00 00 fd 01 d8 00 00 00 f0 af fe 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 54 47
30: 00 00 ac fe 00 00 00 00 00 00 00 00 26 00 08 00

00:07.0 Ethernet controller: Digital Equipment Corporation DECchip 21140 [FasterNet] (rev 20)
Subsystem ID: 10b8:2001
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 20 min, 40 max, 248 set
Interrupt: pin A routed to IRQ 14
Region 0: I/O ports at dc00
Region 1: Memory at feafef80 (32-bit, non-prefetchable)
00: 11 10 09 00 07 01 80 02 20 00 00 02 00 f8 00 00
10: 01 dc 00 00 80 ef af fe 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 b8 10 01 20
30: 00 00 a8 fe 00 00 00 00 00 00 00 00 0e 01 14 28

00:14.0 RAM memory: Intel Corporation 82450GX [Orion] (rev 04)
Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
00: 86 80 c5 84 00 00 80 00 04 00 00 05 00 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:19.0 Host bridge: Intel Corporation 82450KX [Orion] (rev 04)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 80 set, cache line size 08
00: 86 80 c4 84 17 01 00 22 04 00 00 06 08 50 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

00:1a.0 Host bridge: Intel Corporation 82450KX [Orion] (rev 04)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 80 set, cache line size 08
00: 86 80 c4 84 17 00 00 22 04 00 00 06 08 50 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

01:09.0 SCSI storage controller: Adaptec AIC-7861 (rev 01)
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 4 min, 4 max, 32 set, cache line size 08
Interrupt: pin A routed to IRQ 15
Region 0: I/O ports at e800
Region 1: Memory at febff000 (32-bit, non-prefetchable)
00: 04 90 78 61 17 01 80 02 01 00 00 01 08 20 00 00
10: 01 e8 00 00 00 f0 bf fe 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 be fe 00 00 00 00 00 00 00 00 0f 01 04 04

-- 
David Hankins,             "If you don't do it right the first time,
Mercenary				    you'll just have to do it again."
							-- J.T. Hankins

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