> Also, for those that appear to still have SMP interrupt stability
> problems, Ingo pointed out that we may have problems with PCI
> level-triggered interrupts. Could those people please test an additional
I think it was Richard who pointed out this problem and, IMO, this was
quite relevant.
You certainly mean level _sensitive_ interrupt. Such interrupt line
signaling probably needs some special logic to trigger the IRQ and
to allow acknowledging it. As pointed out, we donnot want to aknowledge
the thing before devices drivers have cleared the interrupt condition
of all devices that shared a level-sensitive interrupt line.
> small patch that involves moving the "ack_APIC_irq();" inside
> arch/i386/kernel/irq.c: do_ioapic_IRQ() from the top of the function to
> the very bottom of that function (that will move it to outside the irq
> controller lock, but it should actually be perfectly ok in this case).
If this will have the expected effect, this will be fine.
BTW, I cannot help for testing this stuff since I only have UP.
Regards,
Gerard.
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