Re: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102

Steven N. Hirsch (
Mon, 18 May 1998 17:37:59 -0400 (EDT)

On Mon, 18 May 1998, Etienne Lorrain wrote:

> Hi,
> >
> > OTOH when the clock is _stopped_ (e.g. APM), the Centaur, just like the
> > Intel and the AMD K5/K6, will dissipate around 350 mW. However, coming
> > out of a clock stop condition is expensive in terms of clock cycles,
> > because the CPU internal clock PLL must re-synchronize with the external
> > clock input.
> Just to add few words on this thread:
> Are you sure that stopping and restarting a 200 MHz oscillator
> nearly 100 times per second does not consume more power than
> staying in idle mode ?

I wouldn't jump to the conclusion that the internal clock is being fired
up. Unless I'm misunderstanding something, the Intel chip simply promises
to return monotonically increasing values for 'n' number of years.
There's probably a lot of ways to do this besides bringing up the master
clock signal.


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