Re: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102

H. Peter Anvin (
Wed, 20 May 1998 01:24:16 -0700 (PDT)

> > Also, we should take the intersection of all the capabilities in an
> > SMP system.
> Good idea, but then we would need to distinguish between "capabilities"
> and "incapabilities" (we should assume buggy TSC if _any_ CPU has broken
> TSC, but assume MMX instructions if _all_ CPU's have MMX instructions).
> What about negating all the bug bits? (I.e., having a "working TSC" flag
> instead of "buggy TSC" flag.)

Actually, I vote keeping an internal kernel capabilities word
(separate from the CPUID status word). have_tsc and working_tsc can
be different bits in that word. 1 should always mean that a feature
is *present and functional*.


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