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Date: 25 May 1998 05:31:24 GMT +0100
Subject: linux-kernel-digest V1 #2012
<<< Questo messaggio e' la parte 6 di un precedente messaggio >>>
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To: Pumilia@mbox.est.it
Date: 24 May 1998 18:43:16 GMT +0100
Subject: linux-kernel-digest V1 #2010
<<< Questo messaggio e' la parte 2 di un precedente messaggio >>>
From: Dominik Weis <weis@dom.hws.edu>
Date: Sun, 24 May 1998 09:00:46 -0400 (EDT)
Subject: 2.1.104-1 Intel EtherExpress 10/100
I get that kind of error messages with 2.1.104-1:
May 23 22:07:59 dom2 kernel: eth0: Transmit timed out: status 0050 command
0000.May 23 22:07:59 dom2 kernel: eth0: Tx timeout fill index 17725
scavenge index 17711.
May 23 22:07:59 dom2 kernel: Tx queue 000ca000 000ca000 000ca000
000ca000 000ca000 000ca000 000ca000 000ca000 000ca000 000ca000 000ca000
000ca000 400ca000
0000a000 0000a000 00000000.
May 23 22:07:59 dom2 kernel: Rx ring 00000003 00000003 00000003
00000003 00000003 00000003 00000003 00000003 00000003 00000003 00000003
00000003 00000003 c0000003 00000003 00000003.
May 23 22:07:59 dom2 kernel: eth0: Trying to restart the transmitter...
May 24 05:55:17 dom2 kernel: eth0: Transmit timed out: status 0050 command
0000.May 24 05:55:17 dom2 kernel: eth0: Tx timeout fill index 24579
scavenge index 24563.
May 24 05:55:17 dom2 kernel: Tx queue 0000a000 0000a000 400ca000
00000000 0000a000 0000a000 0000a000 0000a000 0000a000 0000a000 0000a000
0000a000 0000a000
0000a000 0000a000 0000a000.
May 24 05:55:17 dom2 kernel: Rx ring 00000003 00000003 c0000003
00000003 00000003 00000003 00000003 00000003 00000003 00000003 00000003
00000003 00000003 00000003 00000003 00000003.
May 24 05:55:17 dom2 kernel: eth0: Trying to restart the transmitter...
I don't know what it means but the network card is still working.
Dominik
- - ---------------------------------------------------------------------
There is only one thing in the world worse than being talked about,
and that is not being talked about.
- - -Oscar Wilde
- ------------------------------
From: =?ISO-8859-1?Q?Andr=E9?= Derrick Balsa <andrebalsa@altern.org>
Date: Sun, 24 May 1998 14:57:01 -0100
Subject: New Cyrix patch for 2.0.33
This is a multi-part message in MIME format.
- - --------------7037243D5E2F1836105AE4FF
Content-Type: text/plain; charset=iso-8859-1
Content-Transfer-Encoding: 8bit
Hello Alan,
Alan Cox wrote:
.....
> No the xor/sahf/movb thing passes for some PII's (Im beginning to wonder
> if this is a conspiracy) - Intel a) now pass the divide check and b)
> happen to put a very critical BX register at 0x22/0x23 - basically
> the cyrix test turns off the bus arbitrators
>
OK, I basically followed the algorithm that you outlined in another
email:
if has cpuid
do cpuid
else
if cyrix 6x86(L)
turn on cpuid/slop
else
do the 486/386 probe
endif
and came up with the patch attached here, against a clean 2.0.33. I hope
you can still get it into 2.0.34.
I also had to change a small detail in setup.c, so I am sending you the
complete patch against a clean 2.0.33. It has:
a) Correct identification of Cyrix 6x86(Classic, L and MX) CPU.
b) Works around the oops in do_fast_gettimeoffset(). A _very_ neat
time.c patch is in the works by C. Scott Ananian (cananian), but
meanwhile a workaround is still better than an oops, IMHO.
c) Correctly identifies 6x86 steppings.
d) Does not clobber the BX chipset register.
e) Correctly sets up the SLOP bit for 6x86(Classic, L) CPUs.
f) What else? Makes good coffee, shines your shoes, etc... :-)
Here is what I get on my 6x86MX @ 166MHz system:
processor : 0
cpu : 686
model : 6x86MX
vendor_id : CyrixInstead
stepping : 1.6
fdiv_bug : no
hlt_bug : no
f00f_bug : no
fpu : yes
fpu_exception : yes
cpuid : yes
wp : yes
flags : fpu de tsc msr cx8 pge cmov mmx
bogomips : 166.30
BTW I have been told that the new Cyrix MII CPUs have the "Coma bug"
fixed. More info on this as soon as I can get a part for tests.
Cheers,
- - ------------------------
André Balsa
andrebalsa@altern.org
- - --------------7037243D5E2F1836105AE4FF
Content-Type: text/plain; charset=us-ascii; name="Cyrix.patch"
Content-Transfer-Encoding: 7bit
Content-Disposition: inline; filename="Cyrix.patch"
- - --- ./linux/arch/i386/kernel/head.S.orig Wed May 20 23:38:50 1998
+++ ./linux/arch/i386/kernel/head.S Sun May 24 12:52:10 1998
@@ -103,16 +103,17 @@
checkCPUtype:
#endif
- - -/* check if it is 486 or 386. */
+/* check Processor type: 386, 486, 6x86(L) or CPUID capable processor */
/*
* XXX - this does a lot of unnecessary setup. Alignment checks don't
* apply at our cpl of 0 and the stack ought to be aligned already, and
* we don't need to preserve eflags.
*/
+
movl $3, SYMBOL_NAME(x86)
pushfl # push EFLAGS
popl %eax # get EFLAGS
- - - movl %eax,%ecx # save original EFLAGS
+ movl %eax,%ecx # save original EFLAGS in ecx
xorl $0x40000,%eax # flip AC bit in EFLAGS
pushl %eax # copy to EFLAGS
popfl # set EFLAGS
@@ -127,10 +128,11 @@
pushl %eax
popfl # if we are on a straight 486DX, SX, or
pushfl # 487SX we can't change it
- - - popl %eax
- - - xorl %ecx,%eax
+ popl %eax # Also if we are on a Cyrix 6x86(L)
+ xorl %ecx,%eax # OTOH 6x86MXs and MIIs check OK
andl $0x200000,%eax
- - - je is486
+ je is486x
+
isnew: pushl %ecx # restore original EFLAGS
popfl
incl SYMBOL_NAME(have_cpuid) # we have CPUID
@@ -157,7 +159,72 @@
andl $0x80000011,%eax # Save PG,PE,ET
orl $0x50022,%eax # set AM, WP, NE and MP
jmp 2f
- - -is486: pushl %ecx # restore original EFLAGS
+
+/* Now we test if we have a Cyrix 6x86(L). We didn't test before to avoid
+ * clobbering the new BX chipset used with the Pentium II, which has a register
+ * at the same addresses as those used to access the Cyrix special configuration
+ * registers (CCRs).
+ */
+ /*
+ * A Cyrix/IBM 6x86(L) preserves flags after dividing 5 by 2
+ * (and it _must_ be 5 divided by 2) while other CPUs change
+ * them in undefined ways. We need to know this since we may
+ * need to enable the CPUID instruction at least.
+ * We couldn't use this test before since the PPro and PII behave
+ * like Cyrix chips in this respect.
+ */
+is486x: xor %ax,%ax
+ sahf
+ movb $5,%ax
+ movb $2,%bx
+ div %bl
+ lahf
+ cmpb $2,%ah
+ jne ncyrix
+ /*
+ * N.B. The pattern of accesses to 0x22 and 0x23 is *essential*
+ * so do not try to "optimize" it! For the same reason we
+ * do all this with interrupts off.
+ */
+#define setCx86(reg, val) \
+ movb reg,%ax; \
+ outb %ax,$0x22; \
+ movb val,%ax; \
+ outb %ax,$0x23
+
+#define getCx86(reg) \
+ movb reg,%ax; \
+ outb %ax,$0x22; \
+ inb $0x23,%ax
+
+ cli
+ getCx86($0xc3) # get CCR3
+ movb %ax,%cx # Save old value
+ movb %ax,%bx
+ andb $0x0f,%bx # Enable access to all config registers
+ orb $0x10,%bx # by setting bit 4
+ setCx86($0xc3,%bx)
+
+ getCx86($0xe8) # now we can get CCR4
+ orb $0x80,%ax # and set bit 7 (CPUIDEN)
+ movb %ax,%bx # to enable CPUID execution
+ setCx86($0xe8,%bx)
+
+ getCx86($0xfe) # DIR0 : let's check this is a 6x86(L)
+ andb $0xf0,%ax # should be 3xh
+ cmpb $0x30,%ax #
+ jne n6x86
+ getCx86($0xe9) # CCR5 : we reset the SLOP bit
+ andb $0xfd,%ax # so that udelay calculation
+ movb %ax,%bx # is correct on 6x86(L) CPUs
+ setCx86($0xe9,%bx)
+ setCx86($0xc3,%cx) # Restore old CCR3
+ sti
+ jmp isnew # We enabled CPUID now
+
+n6x86: setCx86($0xc3,%cx) # Restore old CCR3
+ sti
+ncyrix: pushl %ecx # restore original EFLAGS
popfl
movl %cr0,%eax # 486
andl $0x80000011,%eax # Save PG,PE,ET
- - --- ./linux/arch/i386/kernel/setup.c.orig Wed May 20 23:38:46 1998
+++ ./linux/arch/i386/kernel/setup.c Sun May 24 14:27:21 1998
@@ -32,6 +32,7 @@
#include <asm/segment.h>
#include <asm/system.h>
#include <asm/smp.h>
+#include <asm/io.h>
/*
* Tell us the machine setup..
@@ -41,12 +42,17 @@
char x86_model = 0; /* set by kernel/head.S */
char x86_mask = 0; /* set by kernel/head.S */
int x86_capability = 0; /* set by kernel/head.S */
- - -int fdiv_bug = 0; /* set if Pentium(TM) with FP bug */
- - -int pentium_f00f_bug = 0; /* set if Pentium(TM) with F00F bug */
+int fdiv_bug = 0; /* set if Pentium(tm) with FP bug */
+int pentium_f00f_bug = 0; /* set if Pentium(tm) with F00F bug */
int have_cpuid = 0; /* set if CPUID instruction works */
char x86_vendor_id[13] = "unknown";
+unsigned char Cx86_step = 0;
+static const char *Cx86_type[] = {
+ "unknown", "1.3", "1.4", "1.5", "1.6", "2.4", "2.5", "2.6", "2.7 or 3.7", "4.2"
+ };
+
char ignore_irq13 = 0; /* set if exception 16 works */
char wp_works_ok = -1; /* set if paging hardware honours WP */
char hlt_works_ok = 1; /* set if the "hlt" instruction works */
@@ -226,6 +232,60 @@
return NULL;
}
+static const char * Cx86model(void)
+{
+ unsigned char nr6x86 = 0;
+ static const char *model[] = {
+ "unknown", "6x86", "6x86L", "6x86MX", "MII"
+ };
+ switch (x86) {
+ case 5:
+ nr6x86 = ((x86_capability & (1 << 8)) ? 2 : 1); /* cx8 flag only on 6x86L */
+ break;
+ case 6:
+ nr6x86 = 3;
+ break;
+ default:
+ nr6x86 = 0;
+ }
+
+ /* We must get the stepping number by reading DIR1 */
+ outb(0xff, 0x22); x86_mask=inb(0x23);
+
+ switch (x86_mask) {
+ case 0x03:
+ Cx86_step = 1; /* 6x86MX Rev 1.3 */
+ break;
+ case 0x04:
+ Cx86_step = 2; /* 6x86MX Rev 1.4 */
+ break;
+ case 0x05:
+ Cx86_step = 3; /* 6x86MX Rev 1.5 */
+ break;
+ case 0x06:
+ Cx86_step = 4; /* 6x86MX Rev 1.6 */
+ break;
+ case 0x14:
+ Cx86_step = 5; /* 6x86 Rev 2.4 */
+ break;
+ case 0x15:
+ Cx86_step = 6; /* 6x86 Rev 2.5 */
+ break;
+ case 0x16:
+ Cx86_step = 7; /* 6x86 Rev 2.6 */
+ break;
+ case 0x17:
+ Cx86_step = 8; /* 6x86 Rev 2.7 or 3.7 */
+ break;
+ case 0x22:
+ Cx86_step = 9; /* 6x86L Rev 4.2 */
+ break;
+ default:
+ Cx86_step = 0;
+ }
+ return model[nr6x86];
+}
+
static const char * i686model(unsigned int nr)
{
static const char *model[] = {
@@ -240,16 +300,20 @@
{
const char *p = NULL;
static char nbuf[12];
- - - switch (x86) {
- - - case 4:
- - - p = i486model(model);
- - - break;
- - - case 5:
- - - p = i586model(model);
- - - break;
- - - case 6:
- - - p = i686model(model);
- - - break;
+ if (strncmp(x86_vendor_id, "Cyrix", 5) == 0)
+ p = Cx86model();
+ else {
+ switch (x86) {
+ case 4:
+ p = i486model(model);
+ break;
+ case 5:
+ p = i586model(model);
+ break;
+ case 6:
+ p = i686model(model);
+ break;
+ }
}
if (p)
return p;
@@ -297,9 +361,16 @@
CD(x86_vendor_id));
if (CD(x86_mask))
- - - len += sprintf(buffer+len,
- - - "stepping\t: %d\n",
- - - CD(x86_mask));
+ if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
+ len += sprintf(buffer+len,
+ "stepping\t: %d\n",
+ CD(x86_mask));
+ }
+ else { /* we have a Cyrix */
+ len += sprintf(buffer+len,
+ "stepping\t: %s\n",
+ Cx86_type[Cx86_step]);
+ }
else
len += sprintf(buffer+len,
"stepping\t: unknown\n");
- - --- ./linux/arch/i386/kernel/time.c.orig Wed May 20 23:38:46 1998
+++ ./linux/arch/i386/kernel/time.c Sun May 24 02:25:22 1998
@@ -475,29 +475,30 @@
/* Don't use them if a suspend/resume could
corrupt the timer value. This problem
needs more debugging. */
- - - if (x86_capability & 16) {
- - - do_gettimeoffset = do_fast_gettimeoffset;
+ if (x86_capability & 16)
+ if (strncmp(x86_vendor_id, "Cyrix", 5) != 0) {
+ do_gettimeoffset = do_fast_gettimeoffset;
- - - if( strcmp( x86_vendor_id, "AuthenticAMD" ) == 0 ) {
- - - if( x86 == 5 ) {
- - - if( x86_model == 0 ) {
- - - /* turn on cycle counters during power down */
- - - __asm__ __volatile__ (" movl $0x83, %%ecx \n \
- - - .byte 0x0f,0x32 \n \
- - - orl $1,%%eax \n \
- - - .byte 0x0f,0x30 \n "
- - - : : : "ax", "cx", "dx" );
- - - udelay(500);
+ if( strcmp( x86_vendor_id, "AuthenticAMD" ) == 0 ) {
+ if( x86 == 5 ) {
+ if( x86_model == 0 ) {
+ /* turn on cycle counters during power down */
+ __asm__ __volatile__ (" movl $0x83, %%ecx \n \
+ .byte 0x0f,0x32 \n \
+ orl $1,%%eax \n \
+ .byte 0x0f,0x30 \n "
+ : : : "ax", "cx", "dx" );
+ udelay(500);
+ }
}
- - - }
- - - }
+ }
- - - /* read Pentium cycle counter */
- - - __asm__(".byte 0x0f,0x31"
- - - :"=a" (init_timer_cc.low),
- - - "=d" (init_timer_cc.high));
- - - irq0.handler = pentium_timer_interrupt;
- - - }
+ /* read Pentium cycle counter */
+ __asm__(".byte 0x0f,0x31"
+ :"=a" (init_timer_cc.low),
+ "=d" (init_timer_cc.high));
+ irq0.handler = pentium_timer_interrupt;
+ }
#endif
setup_x86_irq(0, &irq0);
}
- - --------------7037243D5E2F1836105AE4FF--
- ------------------------------
From: Gerard Roudier <groudier@club-internet.fr>
Date: Sun, 24 May 1998 14:30:25 +0200 (MET DST)
<<< Continua nel prossimo messaggio >>>
--PAC00195.896102051/wigner.cstc.org--
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