>Andrew Derrick Balsa writes:
>> Hi Andrea,
>>
>> Andrea Arcangeli wrote:
>> >=20
>> > On Fri, 29 May 1998, Pavel Machek wrote:
>> >=20
>> > >Don't think so. Well, it is safe on i386, but on other architectures,
>> > >test_and_set_bit is not guaranteed to be atomic. [And I'm afraid that
>> >=20
>> > Arggh I thought that test_and_set_bit() was atomic on all ports (since =
>> I
>> > looked only its i386 implementation)!
>>
>> test_and_set is *by* *definition* an atomic operation. However, some
>> processors don't have an opcode that implements atomic test_and_set. On
>> these processors, we either use another atomic instruction to build a
>> function that implements atomic test_and_set, or, if the architecture is
>> not SMP capable, just forget about the atomicity requirement.
>
>Hold on: even if the machine has a single CPU, you still need to
>guarantee atomicity because of interrupt handlers. On a single CPU
>machine you could do this by disabling interrupts. But you can't
>just ignore the whole issue because you only have one CPU.
Woops, I think that test_and_set_bit() has to be atomic only in respect of
SMP (as i386 implementation). Maybe "atomic" is not the best word to
describe test_and_set_bit(), "SMP safe" should feel better...
Andrea[s] Arcangeli
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