> BUt you have to consider:
>
> * tsc speed may change with time.
not really, it's coupled to the bus clock. It's inaccurate, but then
again, the original timer interrupt is inaccurate as well. Here is where
ntpd does it's job. APM is a different matter and not really a problem, as
we always want to measure 'delta' values of the cycle counter, not the
absolute value.
> * each processor can run on other speed.
not the case on Intel SMP at least.
> * this needs touching all architectures and adding 'get_time64()'
> function. I've done this for intel...
> * this brand new tsc system needs some calibration
we have this calibration already.
> * not all CPUs have tsc. Would using jiffie+get_slow_timeoffset do the
> trick and still be fast enough on 486?
get_slow() executes in ~6-7 microseconds, we do not want to do that ...
but then again, this whole issue is only a problem on higly loaded ISP's
servers, which will probably not run a 486. [and, the jiffies based
calculation is still as good as the current one, so we give up nothing]
-- mingo
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