> Agreed.. but my question was about why i see periodic mega-latencies of
> the order of 15us every 30 seconds or so. I want to track the source of
> this, so that _if_ i can dsiable that probelm, I have a much more
> predictable APIC interrupt latency.
do you have an SMP system or are you using the local APIC timer on a
uniprocessor system? On an SMP system many things might explain this. On a
UP one it's interesting. It cannot really be forced memory refresh, as
that one happens every 200msecs even with BIOS options tweaked.
It _could_ be memory refresh though, but this depends on the interval of
the APIC timer. Forced memory refresh happens periodically, driven by
memory clock. So depending on what the _exact_ latency of the APIC timer
is (which is memory clocks too, incidentally) it might 'resonate' with the
frequency of the memory refresh. Eg., if the APIC IRQ comes every 1200
cycles, and refresh happens every 20000 cycles, the smallest common
denominator is something like 60000 cycles. Depending on the real numbers,
the smallest common denominator might be exactly 30 seconds... This
depends on your DRAM type and memory controller settings too, eg. if you
have hidden refresh turned on this effect is unlikely.
this theory fails if the phenomenon does not change if you change the APIC
timer's interval. Also it would be good to remove all unnecessary devices
from the PCI bus too, as they might periodically hold up the memory bus.
-- mingo
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