Re: 2.1.110 and newer, SB AWE64

MOLNAR Ingo (mingo@chiara.csoma.elte.hu)
Sun, 6 Sep 1998 20:31:30 +0200 (CEST)


On Sun, 6 Sep 1998, Alan Cox wrote:

> The two sets of folks seem to be
>
> 1. VIA VPx motherboards - apparently hardware is crap ?
> 2. A few SMP machines (non VIA chipset)
>
> The second case is weird and I still don't understand its cause. Its
> as if the DMA functions for a given channel is getting messed with twice
> at the same time or something

hm, if DMA channels are being mucked with from within an IRQ handler, then
we should spinlock the DMA controller itself. It's only in recent kernels
that a cli() in an IRQ handler doesnt lock out other IRQs from doing stuff
on other CPUs. So if the DMA controller isnt robust enough against a 'mix'
of commands interleaved from two CPUs going to two different channels,
then we might have a problem. Eg, in Andrea's fixpatch:

- disable_dma(dmap->dma);
pos = dmap->bytes_in_use - get_dma_residue(chan);
- enable_dma(dmap->dma);

i'm not sure though wether this is really done from IRQ handlers. A quick
look at asm/dma.h shows some nonatomic DMA related functions, wondering
wether anyone has though about their SMP compatibility. On the other hand
i have an AWE64 myself and Quake runs well too, but havent seen any lockup
yet. (but this is the only DMA active ISA device here)

the clean solution IMO is to add a global spinlock to DMA controllers.

-- mingo

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