I just downloaded 2.1.125 and looked into our pre-2.2 kernel.
No need to tell I think it is perhaps broken in some driver place. ;-)
If I have been able to understand correctly how the thing work:
C code isr:
-----------
C0) loop until no interrupt condition:
C1) if command complete
C2) clear the commande complete flag from the isr
C3) proceed completed commands
etc ...
Sequencer:
----------
S1) push the complete SCB to the complete queue
S2) raise the command complete interrupt flag
As you driver is supporting MMIO, C2 may be posted as a PCI write
transaction. If S1 is also a PCI memory write from the sequencer, it also
may be posted (I am not sure of that, but I am sure you will confirm or
infirm).
If S1 occurs after C0 and before C2 and both S1 and C2 are posted, then
your driver can miss the latest SCB completed by S1. If there is no other
pending commands, the driver may not recieve any further interrupt for
the latest completed SCB.
I also noticed that you are using the following contruct for handling
interrupts:
do
{
aic7xxx_isr(irq, dev_id, regs);
} while ( (aic_inb(p, INTSTAT) & INT_PEND) );
I often noticed this in BSD stuff. If the purpose is not to lose PCI
interrupt, let me tell you that such a construct is, in my opinion, kind
of bad quality band-aid. On the other hand, you seem to import lots of BSD
material into Linux kernel. I did so years ago. I think that Linux has
most subtlenesses in various places than BSD stuff, even if it may look
sometimes a bit more broken. If would suggest you to be a bit more
selective in BSD stuff importation into the Linux kernel.
Regards,
Gerard.
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