> > If I believe word of my colleague (I believe), 440BX chipset must have such
> > capability. (To convert burst-read (aka cache line fill) on host bus
> > to burst-read transaction on PCI)
> > I do not have enough time to validate his word right now, but does this
> > behavior sounds so strange ?
>
> not so much. I have no trouble to believe that BX's have such a cabability
> (at last !!) but the point is that it's not a WinNT feature, but a BX one.
Of course, I know.
But from my understanding, Linux (at least v2.0.X) does not have such
feature (vremap() with cache attribute control).
I dislike Windoze, but WinNT has it.
> If you could 'track' your colleague to get some information on the
> register to tweek, you'd be useful to a lot of people.
> In the mean time, i'll try to download BX specs from Intel site.
> regards.
He do not touch anything about chipset/cpu register setting.
He just use following WinNT system call:
MmMapIoSpace(
mappedAddr, // Physical Address
memCount[i], // Number of Bytes (Memory map size)
cacheEnable); // CacheEnable
Rest of jobs are done by WinNT executive.
By the way, I'm porting device driver written for 2.0.X to 2.1.X to
use __ioremap() call.
Almost completed, other than one point.
In mmap_xxxx() function, I use vma->vm_inode like this:
int chigasaki_mmap(struct inode *inode, struct file *filp,
struct vm_area_struct *vma)
{
......
vma->vm_inode = inode;
inode->i_count++;
}
But on v2.1.X, vm_inode member is missing from struct vm_area_struct.
Would anyone help me how should I rewrite this ?
Thank you in advance.
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