Re: Non-page-aligned PCI base address

Martin Mares (mj@ucw.cz)
Tue, 24 Nov 1998 16:50:15 +0100


Hi,

> Does anybody has an idea how to fix above ? I couldn't find anything about
> it in any docs/code. The box where my kernel module was tested (AMI
> Motherboard Goliath II PCI/EISA) has 7 PCI slots on 2 buses (that means,
> probably too much), and by some cards I got
>
> this strange base 0 addr: 0xfebffd80 (as found in pci_dev->base_address[0];
> ^^^
> The size of base0 is 0x80. Is it possible that bios makes some attempts
> to 'save' address space, being too pedantic ?
>
> This is bad if I want to perform ioremap() to access control registers of
> the card through mapped memory (needed in ISR for IRQ status/config regs
> access). The kernel where it was tested was 2.1.108. Momentary, I'm
> aligning the address to the nearest bottom page and ioremap it, keeping
> track of the address offset when accessing it. But is sucha thing realy
> necessary ?
>
> Please cc my address if you got some answer, as I'm not subscribed here.

This seems to be perfectly correct -- PCI just states every memory / I/O
region has to be aligned to a multiple of its size and that the size is
a power of two >= 16 (memory) or 4 (I/O). Therefore you cannot expect
memory regions smaller than 4K to be page-aligned.

Anyway, can you send me lspci -vvx output for this device?

Have a nice fortnight

-- 
Martin `MJ' Mares   <mj@ucw.cz>   http://atrey.karlin.mff.cuni.cz/~mj/
Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth
"MIPS:  Meaningless Indicator of Processor Speed."

- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/