Digging a bit deeper into AMD's documentation, I found that this is only
true for the stepping A of the model 6. Beginning with the B step model
6, bit 11 is used for SYSCALL/SYSRET. Bit 10 is now marked as
"reserved", and probably should be ignored. I've been experimenting
with implementing a SYSCALL handler, but the MSR that controls it seems
to be unimplemented on my chip (K6-233, model 6, C step). I've wanted
to upgrade anyways, so this is more incentive...
In short, my previous patch doesn't really work as advertised. Bit 10
now is either advertising a feature AMD isn't telling anybody about, or
it is erroneous.
PS. A while back (a year ago?) somebody had posted a patch that started
to implement SYSCALL. Does anybody remember who posted it or where I
can find it?
--Brian Gerst
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