Yes - I don't think anything much was sucessfully read or written to
the disks!
>
> Does it behave well without the piix.c chipset code?
> If so, and everything is cool..........
It's fine if I don't configure the PIIX code
> I need a copy of the output from the "lspci" tool.
>
> lspci -bxxxvv > P55T2P4-430HX.pci
Attached
>
> This will tell me what the BIOS did to solve the 430HX udma
> detection/access errors that I missed in the docs.
> Imperical data is alwasys better than the docs.
--[[application/octet-stream
Content-Disposition: attachment; filename="P55T2P4-430HX.pci"][8bit]]
00:00.0 Host bridge: Intel Corporation 430HX - 82439HX TXC [Triton II] (rev 03)
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ >SERR- <PERR-
Latency: 32 set
Region 0: Memory at <unassigned> (32-bit, non-prefetchable)
Region 1: Memory at <unassigned> (32-bit, non-prefetchable)
Region 2: Memory at <unassigned> (32-bit, non-prefetchable)
Region 3: Memory at <unassigned> (32-bit, non-prefetchable)
Region 4: Memory at <unassigned> (32-bit, non-prefetchable)
Region 5: Memory at <unassigned> (32-bit, non-prefetchable)
00: 86 80 50 12 06 01 00 22 03 00 00 06 00 20 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 09 00 b1 14 00 00 10 03 49 10 55 11 00 00 11 11
60: 08 08 10 10 10 10 10 10 05 00 00 00 00 00 00 00
70: 20 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 11 55 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 18 0f 00 00 00 00 00 00
00:07.0 ISA bridge: Intel Corporation 82371SB PIIX3 ISA [Natoma/Triton II] (rev 01)
Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 0 set
Region 0: Memory at <unassigned> (32-bit, non-prefetchable)
Region 1: Memory at <unassigned> (32-bit, non-prefetchable)
Region 2: Memory at <unassigned> (32-bit, non-prefetchable)
Region 3: Memory at <unassigned> (32-bit, non-prefetchable)
Region 4: Memory at <unassigned> (32-bit, non-prefetchable)
Region 5: Memory at <unassigned> (32-bit, non-prefetchable)
00: 86 80 00 70 0f 00 80 02 01 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 09 00 23 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 0b 80 0a 09 00 00 00 00 00 f2 00 00 00 00 00 00
70: 0f 00 00 00 00 00 0c 0c 02 00 00 00 00 00 00 00
80: 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 09 00 a0 00 02 01 00 20 0f 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 10 0f 00 00 00 00 00 00
00:07.1 IDE interface: Intel Corporation 82371SB PIIX3 IDE [Natoma/Triton II] (prog-if 80)
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 32 set
Region 0: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 1: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 2: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 3: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 4: I/O ports at e800
Region 5: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
00: 86 80 10 70 05 00 80 02 00 80 01 01 00 20 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 e8 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
40: 77 e3 77 e3 bb 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 10 0f 00 00 00 00 00 00
00:09.0 VGA compatible controller: S3 Inc. Vision 968
Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Interrupt: pin A routed to IRQ 9
Region 0: Memory at e4000000 (32-bit, non-prefetchable)
Region 1: Memory at <unassigned> (32-bit, non-prefetchable)
Region 2: Memory at <unassigned> (32-bit, non-prefetchable)
Region 3: Memory at <unassigned> (32-bit, non-prefetchable)
Region 4: Memory at <unassigned> (32-bit, non-prefetchable)
Region 5: Memory at <unassigned> (32-bit, non-prefetchable)
00: 33 53 f0 88 83 00 00 02 00 00 00 03 00 00 00 00
10: 00 00 00 e4 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 09 01 00 00
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0a.0 Multimedia audio controller: Ensoniq AudioPCI (rev 01)
Subsystem: Unknown device 4942:4c4c
Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 12 min, 128 max, 32 set
Interrupt: pin A routed to IRQ 10
Region 0: I/O ports at e000
Region 1: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 2: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 3: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 4: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
Region 5: Memory at <unassigned> (32-bit, non-prefetchable) [disabled]
00: 74 12 00 50 05 00 00 04 01 00 01 04 00 20 00 00
10: 01 e0 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 42 49 4c 4c
30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 0c 80
40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00:0c.0 SCSI storage controller: Symbios Logic Inc. (formerly NCR) 53c875 (rev 26)
Subsystem: Unknown device 1de1:3904
Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr+ Stepping- SERR- FastB2B-
Status: 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
Latency: 17 min, 64 max, 32 set, cache line size 08
Interrupt: pin A routed to IRQ 11
Region 0: I/O ports at d800
Region 1: Memory at e3800000 (32-bit, non-prefetchable)
Region 2: Memory at e3000000 (32-bit, non-prefetchable)
Region 3: Memory at <unassigned> (32-bit, non-prefetchable)
Region 4: Memory at <unassigned> (32-bit, non-prefetchable)
Region 5: Memory at <unassigned> (32-bit, non-prefetchable)
00: 00 10 0f 00 57 00 10 02 26 00 00 01 08 20 00 00
10: 01 d8 00 00 00 00 80 e3 00 00 00 e3 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 e1 1d 04 39
30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 11 40
40: 01 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00
50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: da 00 00 05 47 00 0f 07 35 00 00 00 80 00 0f 02
90: ff 00 f1 03 00 ff ff ff 00 f0 35 60 c8 02 00 e3
a0: 00 08 24 00 00 00 00 50 e8 02 00 e3 f0 02 00 e3
b0: 00 00 00 e3 f8 50 f1 03 46 6d 00 81 f0 02 00 e3
c0: 8f 05 00 00 d8 00 70 0f 0c 00 80 00 07 0c 02 80
d0: 00 00 02 80 00 00 02 80 00 00 02 80 00 84 00 00
e0: 40 01 00 43 a1 f0 53 a3 02 28 3d 23 3b 6c 0b a2
f0: 44 06 27 16 6f 4f 6a 06 40 16 ae 21 a4 97 4e 88
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