I am not too sure you could rely on this.
> typedef unsigned char BYTE;
> typedef unsigned short int WORD;
>
> #define RTC_SECONDS 0
>
> WORD cmos_ram_size(void)
> {
> WORD limit = 64;
> BYTE new, old;
>
> while (limit < 32768) {
> old = read_rtc(limit+RTC_SECONDS);
> sleep( 1 );
> new = read_rtc(limit+RTC_SECONDS);
> if (old != new)
> break;
> limit <<= 1;
> }
> return (limit);
> }
>
> Assuming that the returned value indicates the size of the CMOS's
> address space, and that read_rtc(addr) returns the current value of
> the byte at the RTC's register with the specified address, that will
> correctly handle CMOS chips with up to 32k of CMOS RAM. I would tend
wrong. RTC NVRAM has a single address byte, the msb of which is used to
mask / unmask the nmi.
> to assume that chips with larger RAM are not currently available, but
> if they are, it's not hard to extend the above to support them.
there have been several approaches to larger NVRAM sizes (one for the PS/2
and one by Compaq at least).
> The above code makes the following assumptions:
>
> 1. The register at address 0 returns the current second as
> stored in the RTC. I have NOT checked that this is the
> correct offset, but if not, just put the relevant offset
> in the definition of RTC_SECONDS.
>
> 2. The result of the sleep(1) call will always be sufficient
> for the second counter to tick over.
3. you have several seconds to wait for the autodetection to work
4. nobody else sets the RTC
5. if you have an old RTC, it will handle the bit 6 set case correctly
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