When I overclock my dual Celeron 366 on an Abit BP6 mobo, the first thing
to fail is a consistant 2.2.10 crash with a "stuck on TLB ILI wait on CPU1"
message. The crash is partial since the machine remains keybd responsive,
and processes keep running. But any attempt at disk activity hangs that
console. shutdown won't run, nor will CTL-ALT-DEL.
This message originates in arch/i386/kernel/smp.c , so I tried increasing
the stuck counter to 500M. No help. My CPU0 is good as uniproc to 5.5*100,
my CPU1 only to 5.5*99. But I get the TLB ILI crash at only 2*5.5*97,
altho' the BP6 could be at fault. Not that I'm unhappy with 1045 MHz!
Now either the TLB is the weak point of the Mendecino core, or the BP6
has signal loading problems, or the kernel could be more graceful. I'm
posting on the off-chance of improving the latter. Is 2.3.15 better?
I'm bandwidth-impaired, but there was no "TLB ILI" in the archives.
FWIW, I load my CPU/FPU very heavily for stability testing with cpuburn
(burnP6), my GPL'd optimized asm code -> http://users.ev1.net/~redelm .
It takes CPUs 10'C hotter than kernel compiles. ***USE AT YOUR OWN RISK***
-- Robert Redelmeier redelm@ev1.net
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