> Why wouldn't the NMI oopser work on a given SMP system? And why the
> timer has to be delivered to the BP if these NMIs are exploited? I don't
> see any reasons but I might be missing something.
>
> Note that even if IRQ0 is not connected to any I/O APIC, the LINT0 line
> is usually broadcasted and even if it's not, NMI may be distributed by the
> catcher using "all excluding self" IPI. It is theoretically possible that
> there exist i82489DX based systems that have the NMI output of local APICs
> not connected to the NMI input of CPUs, but have you ever seen or heard of
> such a brain-damaged system? It wouldn't be MPS-compliant, anyway.
the NMI input of the CPUs is turned off once the local APIC is turned on.
So the only input signals to the CPU are LINT0, LINT1 and the APIC bus.
LINT1 is historically the NMI signal of the motherboard, broadcasted to
all CPUs. We knew this pretty well. I'm right now experimenting with
configuring LINT0 as NMI as well, although i feel uneasy about this hack,
we do have legitimate cases of through-local-APIC interrupts - which would
thus become NMIs. It's also horribly dangerous because i have to ack the
8259A IRQ0 interrupt from within the NMI handler - shudders. And it
violates the MP standard. I've tried some other hacks as well, and there
is yet another trick to be tried: we can also set up the local APIC's
performance counter LVT into NMI mode, and switch on the performance
counter that counts timer cycles ... then we'll get periodic NMIs. I'm
pretty much dedicated now to get the NMI oopser done without impacting
IRQ0 distribution.
> I might add a modified NMI oopser to my pending APIC patches (I should
dont bother, i've already put the NMI oopser into my APIC tree (and
modified it), and hacked away on it. Please for now just send your timer
and 486 fixes and i'll merge them in - after that we can still look for
better ways of doing NMI-broadcasts.
> make them available tomorrow, BTW -- they are almost ready but I need to
> perform some additional tests), if you don't object, that would handle all
> legal cases of timer configuration. The current implementation included
> in the ikd patch is somewhat simplistic, indeed.
yep.
-- mingo
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