In the case of segment register operations, the size of 16 bits is
implicit in the opcode, so there is never any need to generate it.
Technically you can do a movl from a 32-bit memory operand to force 32
bits of memory to be touched; otherwise they are exactly equivalent.
Therefore, the assembler should always generate the shortest form. Case
closed.
>
> I'm sure Intel would like to hear from you if you have a devised
> a better way to use their processors, or if you have discovered
> that their documentation is wrong.
>
Intel's documentation is wrong all over the place. They clearly could
care less about the correctness of their documentation. I'm not paid to
proofread their docs for them.
-hpa
-- <hpa@transmeta.com> at work, <hpa@zytor.com> in private!- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/