Re: FD array expansion problem

John Alvord (jalvo@mbay.net)
Sun, 31 Oct 1999 03:25:43 GMT


On Sat, 30 Oct 1999 18:16:16 +1000, Keith Owens <kaos@ocs.com.au>
wrote:

>On Fri, 29 Oct 1999 09:07:15 +0200,
>Ralf Baechle <ralf@uni-koblenz.de> wrote:
>>MIPS II instruction set and better and the Alpha don't have an xchg
>>equivalent but ll / sc instructions, which are more universal. Using
>>them to implement an xchg-like implementation however ends up as a
>>a loop of at least five instructions which we'de prefarably want to avoid.
>
>Same problem on i370. No atomic exchange, not even atomic inc, it all
>has to be done using compare and swap and loop until successful. Most
>of the time the update works first time and no loop is taken. IMHO, we
>have to accept this overhead to simulate xchg instructions on machines
>that do not have the instruction.
>
>i370 equivalent of "xchg word,newvalue".
>
> L R2,newvalue New value to register
>loop L R1,word Current value to register
> CS R1,R2,word Store new value if word is unchanged
> BNE loop It changed, retry with new current value

Not so... the correct way is

L R2,newvalue New value to register
L R1,word Current value to register
LOOP CS R1,R2,word Store new value if word is unchanged
BNE loop It changed, retry with new current value

When the comparison of R1 versus word fails, the new value of word is
swapped into R1 automically. There is also a CDS compare double and
swap, useful for updating doubleword (eight byte, aligned)
automically.

The avoids one load and prevents a race condition if word is changing
rapidly.

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