Re: spin_unlock optimization(i386)

Erich Boleyn (esboleyn@ichips.intel.com)
Wed, 24 Nov 1999 15:21:35 -0800

> About the _read_ memory barrier (rmb()) it must also prevent _following_
> reads to be reordered _before_ the barrier.
>
> read 0x0
> rmb(); /* lock on the bus, I was proposing to replace with a write (wrong!) */
> read 0x20
>
> The rmb() ensure the "read 0x20" will be executed _after_ "read 0x0".
>
> If I understood well by this thread, a write in the middle of two reads
> on IA32 only ensure that the 0x0 is read _before_ the write. But the read
> 0x20 can happen even before the write and before "read 0x0". This in turn
> mean that rmb() can't be implemented with a write in the zero page...

Uhh, if this is to a cacheable memory type, then the read memory barrier is
irrelevant, as all writes by other processors are guaranteed to be observed
in order, so, if some other processor stores into 0x20, then 0x0, your
program will never execute as if it had gotten the wrong data sequence.

If it's an uncacheable memory location (like hardware registers on some
device), then IA32 uses strong ordering, and then reads are not speculative.

So, I guess I'm not sure what you're trying to protect against here.

Erich Boleyn
PMD IA32 Architecture
Intel

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