> Can anyone tell me if there is anyway one can control the replacement of
> a cache-line from kernel space. To give an example, lets say I have a
> memory adress and a size_t and I want to make sure that amount of data is
> not flushed from L1 after it is brought in for a given period of time. Is
> there any way we can do this for i386 ?
Alot of x86 silicon doesn't allow to freeze the cache so this cannot be
implemented. On chips which have such a feature it could be implemented
but isn't currently. Think very hard, then think again before using such
a feature. Often it's a loss.
Ralf
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