Re: [PATCH v4 5/6] i2c: smbus: Support DDR5 SPD EEPROMs

[Guenter Roeck]

On 6/24/24 13:06, Heiner Kallweit wrote:
[ ... ]
> It seems Intel systems never have more than one i801 SMBUS adapter,
> therefore systems with more than 8 memory slots have to use muxing.
> The current code was developed for the Intel use case, and therefore
> doesn't consider that a system may have dedicated SMBUS controllers
> per 8 memory slots. So support for this scenario has to be added.

I absolutely agree, hopefully by someone with such a system.

Thanks,
Guenter