Re: [PATCH v5 0/3] Decouple max_pclk check from constant display feats

[Michael Walle]

On Tue Aug 19, 2025 at 9:21 PM CEST, Swamil Jain wrote:
> In an effort to make the existing compatibles more usable, we are
> removing the max_pclk_khz form dispc_features structure and doing the
> supported pixel clock checks using "max_successful_rate[]" and
> "max_attempted_rate[]".
>
> Changes are fully backwards compatible.
>
> After integration of OLDI support[0], we need additional patches in
> OLDI to identify the VP that has OLDI. We have to do this since
> OLDI driver owns the VP clock (its serial clock) and we cannot perform
> clock operations on those VP clock from tidss driver. This issue was
> also reported upstream when DSI fixes[1] had some clock related calls
> in tidss driver. When "clk_round_rate()" is called, ideally it should
> have gone to "sci_clk_determine_rate()" to query DM but it doesn't since
> clock is owned by OLDI not tidss.
>
> So add a member is_ext_vp_clk[] in tidss_device structure to identify
> this and avoid performing clock operations for VP if it has OLDI panel.
> For the same checks in OLDI driver, atomic_check() hook is added to its
> bridge_funcs.
> In the atomic_check() chain, first the bridge_atomic_check() is called
> and then crtc_atomic_check() is called. So mode clock is first checked
> in oldi driver and then skipped in tidss driver.
>
> Had the tidss_oldi structure been exposed to tidss_dispc.c, we could
> have directly checked VP type in dispc but since the structure is defined
> in tidss_oldi.c , we have to add additional member to tidss_device
> structure.
>
> [0]: https://lore.kernel.org/all/20250528122544.817829-1-aradhya.bhatia@xxxxxxxxx/
> [1]: https://lore.kernel.org/all/DA6TT575Z82D.3MPK8HG5GRL8U@xxxxxxxxxx/

Since that wasn't picked up from v4:

Tested-by: Michael Walle <mwalle@xxxxxxxxxx> # on am67a

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