Re: [Patch v3 0/7] x86 perf bug fixes and optimization

[Mi, Dapeng]

On 8/21/2025 9:39 PM, Peter Zijlstra wrote:
> On Wed, Aug 20, 2025 at 08:55:24AM -0700, Liang, Kan wrote:
>
>>> Dapeng Mi (7):
>>>   perf/x86/intel: Use early_initcall() to hook bts_init()
>>>   perf/x86/intel: Fix IA32_PMC_x_CFG_B MSRs access error
>>>   perf/x86: Check if cpuc->events[*] pointer exists before accessing it
>>>   perf/x86: Add PERF_CAP_PEBS_TIMING_INFO flag
>>>   perf/x86/intel: Change macro GLOBAL_CTRL_EN_PERF_METRICS to
>>>     BIT_ULL(48)
>>>   perf/x86/intel: Add ICL_FIXED_0_ADAPTIVE bit into
>>>     INTEL_FIXED_BITS_MASK
>>>   perf/x86: Print PMU counters bitmap in x86_pmu_show_pmu_cap()
>>>
>> The series looks good to me.
>>
>> Reviewed-by: Kan Liang <kan.liang@xxxxxxxxxxxxxxx>
> I've picked up all but patch 3 -- I really don't think that does the
> right thing.

Thanks. I would rewrite the patch 3 and aggregate it into the arch-PEBS
enabling series.