Re: [PATCH 1/2] arm64: dts: socionext: uniphier-ld20: Add default PCI interrup controller address cells
From: Kunihiko Hayashi
Date: Mon Aug 25 2025 - 00:37:46 EST
Hi Krzysztof,
On 2025/08/22 22:33, Krzysztof Kozlowski wrote:
Add missing address-cells 0 to the PCI interrupt node to silence W=1
warning:
uniphier-ld20.dtsi:941.4-944.29: Warning (interrupt_map):
/soc@0/pcie@66000000:interrupt-map:
Missing property '#address-cells' in node
/soc@0/pcie@66000000/legacy-interrupt-controller, using 0 as fallback
Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
the fourth component "parent unit address", which size is defined by
'#address-cells' of the node pointed to by the interrupt-parent
component, is not used (=0)
I understand that "parent unit address" is omitted, and according to
the devicetree specification, "#address-cells" define the the size of
the address. However, GIC doesn't specify the address, so this line
is needed to indicate it.
For both patches,
Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@xxxxxxxxxxxxx>
There is no tree to manage the SoC-specified commits, so please apply
this series into the DT tree.
Thank you,
---
Best Regards
Kunihiko Hayashi