Re: [PATCH v1 1/3] coresight: tpda: Add sysfs node for tpda cross-trigger configuration
From: Jie Gan
Date: Tue Aug 26 2025 - 05:25:15 EST
On 8/26/2025 5:17 PM, James Clark wrote:
On 26/08/2025 8:01 am, Jie Gan wrote:
From: Tao Zhang <tao.zhang@xxxxxxxxxxxxxxxx>
Introduce sysfs nodes to configure cross-trigger parameters for TPDA.
These registers define the characteristics of cross-trigger packets,
including generation frequency and flag values.
Signed-off-by: Tao Zhang <tao.zhang@xxxxxxxxxxxxxxxx>
Co-developed-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
---
.../testing/sysfs-bus-coresight-devices-tpda | 43 ++++
drivers/hwtracing/coresight/coresight-tpda.c | 241 ++++++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 27 ++
3 files changed, 311 insertions(+)
create mode 100644 Documentation/ABI/testing/sysfs-bus-coresight-
devices-tpda
[...]
+#define TPDA_FPID_CR (0x084)
+
+/* Cross trigger FREQ packets timestamp bit */
+#define TPDA_CR_FREQTS BIT(2)
+/* Cross trigger FREQ packet request bit */
+#define TPDA_CR_FRIE BIT(3)
+/* Cross trigger FLAG packet request interface bit */
+#define TPDA_CR_FLRIE BIT(4)
+/* Cross trigger synchronization bit */
+#define TPDA_CR_SRIE BIT(5)
+/* Packetize CMB/MCMB traffic bit */
+#define TPDA_CR_CMBCHANMODE BIT(20)
+
/* Aggregator port enable bit */
#define TPDA_Pn_CR_ENA BIT(0)
/* Aggregator port CMB data set element size bit */
#define TPDA_Pn_CR_CMBSIZE GENMASK(7, 6)
/* Aggregator port DSB data set element size bit */
#define TPDA_Pn_CR_DSBSIZE BIT(8)
+/* Mode control bit */
+#define TPDA_MODE_CTRL BIT(12)
This one is missing the register name prefix, like TPDA_SYNCR_MODE_CTRL
Yes, you are right. Besides, I made a mistake here. I should put this
Macro in patchset 2.
Anyway, I will fix it in next version.
Thanks,
Jie