[PATCH 1/2] dt-bindings: gpu: mali-valhall-csf: add asn-hash

[Chia-I Wu]

The values are written to ASN_HASH[0..2] registers. The property is
called "l2-hash-values" in the downstream driver.

Signed-off-by: Chia-I Wu <olvaffe@xxxxxxxxx>
---
 .../devicetree/bindings/gpu/arm,mali-valhall-csf.yaml     | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
index a5b4e00217587..258bcba66d1d1 100644
--- a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@@ -85,6 +85,14 @@ properties:
 
   dma-coherent: true
 
+  asn-hash:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+      The values are written to ASN_HASH[0..2] registers. They affect how
+      physical addresses are mapped to L2 cache slices.
+    minItems: 3
+    maxItems: 3
+
 required:
   - compatible
   - reg
-- 
2.51.0.318.gd7df087d1a-goog