Re: [PATCH v1 2/2] iio: adc: Add the NXP SAR ADC support for the s32g2/3 platforms

From: Daniel Lezcano

Date: Tue Sep 09 2025 - 05:06:30 EST


On 04/09/2025 09:33, Andy Shevchenko wrote:
On Wed, Sep 03, 2025 at 05:28:09PM +0200, Daniel Lezcano wrote:
On 03/09/2025 13:48, Andy Shevchenko wrote:
On Wed, Sep 03, 2025 at 12:27:56PM +0200, Daniel Lezcano wrote:

[ ... ]

+ nxp_sar_adc_channels_enable(info, 1 >> chan->channel);

1 >> ?!? Did you want BIT(channel)? Or simply channel != 0?

Yeah, BIT(chan->channel) is better

But is the above a bug in the original proposal or not? I mean one wanted left
instead of right shift.

It is actually a bug, you are right it should have been left shift

+ dmaengine_tx_status(info->dma_chan,
+ info->cookie, &state);

Perfectly one line. No return check?

Ok, will see if the IIO DMA API has an impact on this portion of code before
checking the return code. However, the status is often ignored in the other
drivers.

...which doesn't mean it's a good example to follow.





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