Re: [PATCH 5/5] drm/msm/registers: Sync GPU registers from mesa

From: Dmitry Baryshkov
Date: Tue Sep 09 2025 - 11:03:14 EST


On Mon, Sep 08, 2025 at 12:30:08PM -0700, Rob Clark wrote:
> In particular, to pull in a SP_READ_SEL_LOCATION bitfield size fix to
> fix a7xx GPU snapshot.
>
> Sync from mesa commit 15ee3873aa4d ("freedreno/registers: Update GMU
> register xml").
>
> Cc: Karmjit Mahil <karmjit.mahil@xxxxxxxxxx>
> Signed-off-by: Rob Clark <robin.clark@xxxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 8 +-
> drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 4 +-
> drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 702 ++++++++++--------
> .../msm/registers/adreno/a6xx_descriptors.xml | 40 -
> .../drm/msm/registers/adreno/a6xx_enums.xml | 50 +-
> .../drm/msm/registers/adreno/adreno_pm4.xml | 179 ++---
> 6 files changed, 508 insertions(+), 475 deletions(-)
>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>


--
With best wishes
Dmitry