Re: [PATCH net-next V2] net/mlx5: Improve write-combining test reliability for ARM64 Grace CPUs

From: Patrisious Haddad
Date: Tue Sep 16 2025 - 05:47:51 EST



On 9/16/2025 11:58 AM, Arnd Bergmann wrote:
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On Tue, Sep 16, 2025, at 10:39, Patrisious Haddad wrote:
On 9/16/2025 2:15 AM, Nathan Chancellor wrote:
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ifeq ($(ARCH),arm64)
CFLAGS_lib/neon_iowrite64_copy.o += -ffreestanding
CFLAGS_REMOVE_lib/neon_iowrite64_copy.o += -mgeneral-regs-only
endif

Which is actually equivalent to the diff you sent, Thanks for the
heads-up will fix and resend.

I think it's better to handle this inside of the inline asm itself
by adding

".arch_extension simd;\n\t"

at the start of it.

I don't get it why and how is that better - than using the correct CC flags for neon, also are you suggesting this in addition or instead of the CC flags fix natan sent above ?

Using the correct CC flags by itself is sufficient and correct - and I don't see other neon users using the ".arch_extension simd" you mentioned , so why do you think it is needed here ?

and I'm assuming you meant to add it like so? (incase it is really needed - I'm still not convinced it is ...)

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lib/wc_neon_iowrite64_copy.c b/drivers/net/ethernet/mellanox/mlx5/core/lib/wc_neon_iowrite64_copy.c
index 8c07d2040607..cde3d11909a8 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/lib/wc_neon_iowrite64_copy.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/lib/wc_neon_iowrite64_copy.c
@@ -6,7 +6,8 @@
 void mlx5_wc_neon_iowrite64_copy(void __iomem *to, const void *from)
 {
        asm volatile
-       ("ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%0]\n\t"
+       (".arch_extension simd;\n\t"
+       "ld1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%0]"
        "st1 {v0.16b, v1.16b, v2.16b, v3.16b}, [%1]"
        :
        : "r"(from), "r"(to)


Patrisious.


Arnd