Re: [PATCH v2 3/4] arm64: dts: imx8mm-evk: limit the max frequency of spi nor chip
From: Peng Fan
Date: Thu Sep 18 2025 - 03:50:36 EST
On Wed, Sep 17, 2025 at 04:42:29PM +0800, Haibo Chen wrote:
>The spi nor on imx8mm evk board works under SDR mode, and
>driver use FlexSPIn_MCR0[RXCLKSRC] = 0x0 for SDR mode.
>According to the datasheet, there is IO limitation on this chip,
>the max frequency of such case is 66MHz, so add the limitation
>here to align with datasheet.
>
>Refer to 3.9.10 FlexSPI timing parameters on page 59.
>https://www.nxp.com/docs/en/data-sheet/IMX8MMIEC.pdf
The SoC SDR mode max supports 66MHz, 133MHz. DDR mode max supports 33MHz and
66MHz. Saying the driver now only use RXCLKSRC 0 to restrict the
device tree to 66MHz is not that correct.
The SoC max frequency could be coded in driver per my understanding.
For the QSPI-NOR chip, the spi-max-frequency should represent the NOR chip
frequency. But that chip supports SDR/DDR, so a new property
spi-ddr-max-frequency, if we take spi-max-frequency as the max NOR
CHIP SDR mode frequency?
So if spi-max-frequency is the maximum NOR chip SDR frequency, the driver
should also be update dthat DDR mode is not supported as of now.
Just my thoughts.
Regards
Peng.