Re: [PATCH v4 4/6] arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe

From: Geert Uytterhoeven
Date: Thu Sep 18 2025 - 05:16:08 EST


Hi Claudiu,

On Fri, 12 Sept 2025 at 14:24, Claudiu <claudiu.beznea@xxxxxxxxx> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
>
> The first 128MB of memory is reserved on this board for secure area.
> Secure area is a RAM region used by firmware. The rzg3s-smarc-som.dtsi
> memory node (memory@48000000) excludes the secure area.
> Update the PCIe dma-ranges property to reflect this.
>
> Tested-by: Wolfram Sang <wsa+renesas@xxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi
> @@ -214,6 +214,16 @@ &sdhi2 {
> };
> #endif
>
> +&pcie {
> + /* First 128MB is reserved for secure area. */

Do you really have to take that into account here? I believe that
128 MiB region will never be used anyway, as it is excluded from the
memory map (see memory@48000000).

> + dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>;

Hence shouldn't you add

dma-ranges = <0x42000000 0 0x48000000 0 0x48000000 0x0 0x38000000>;

to the pcie node in arch/arm64/boot/dts/renesas/r9a08g045s33.dtsi
instead, like is done for all other Renesas SoCs that have PCIe?

> +};
> +
> +&pcie_port0 {
> + clocks = <&versa3 5>;
> + clock-names = "ref";
> +};

This is not related.

> +
> &pinctrl {
> #if SW_CONFIG3 == SW_ON
> eth0-phy-irq-hog {

Gr{oetje,eeting}s,

Geert


--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds