Re: [PATCH] clk: clocking-wizard: Fix output clock register offset for Versal platforms

[Stephen Boyd]

Quoting Shubhrajyoti Datta (2025-09-05 02:10:02)
> The output clock register offset used in clk_wzrd_register_output_clocks
> was incorrectly referencing 0x3C instead of 0x38, which caused
> misconfiguration of output dividers on Versal platforms.
> 
> Correcting the off-by-one error ensures proper configuration of output
> clocks.
> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxx>
> ---

Applied to clk-next