Re: [PATCH v3 7/8] soc: renesas: Add support for Renesas RZ/N1 GPIO Interrupt Multiplexer

[Wolfram Sang]

Hi Herve,

> +#define IRQMUX_MAX_IRQS 8
> +
> +static int irqmux_setup(struct device *dev, struct device_node *np, u32 __iomem *regs)

The whole driver would benefit from a 'rzn1_irqmux' instead of 'irqmux'
prefix, I'd say.

> +	for_each_of_imap_item(&imap_parser, &imap_item) {
> +		/*
> +		 * The child #address-cells is 0 (already checked). The first
> +		 * value in imap item is the src hwirq.
> +		 *
> +		 * imap items matches 1:1 the interrupt lines that could
> +		 * be configured by registers (same order, same number).
> +		 * Configure the related register with the src hwirq retrieved
> +		 * from the interrupt-map.
> +		 */

I haven't looked into the above for_each_of_imap_item-helper. But
wouldn't it be possibleto retrieve the GIC_SPI number as well and use
the correct register based on that? That would remove the need of an
already sorted interrupt-map.

> +		if (index > IRQMUX_MAX_IRQS) {
> +			of_node_put(imap_item.parent_args.np);
> +			dev_err(dev, "too much items in interrupt-map\n");
> +			return -EINVAL;

-E2BIG? With such a unique errno, we could even drop the dev_err.

> +		}
> +
> +		writel(imap_item.child_imap[0], regs + index);
> +		index++;
> +	}
> +
> +	return 0;
> +}
> +
> +static int irqmux_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	u32 __iomem *regs;
> +	int nr_irqs;
> +	int ret;
> +
> +	regs = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(regs))
> +		return PTR_ERR(regs);
> +
> +	nr_irqs = of_irq_count(np);
> +	if (nr_irqs < 0)
> +		return nr_irqs;
> +
> +	if (nr_irqs > IRQMUX_MAX_IRQS) {
> +		dev_err(dev, "too many output interrupts\n");
> +		return -ENOENT;

-E2BIG? Wait, isn't this the same check twice?

Thanks for this work,

   Wolfram

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