Re: [PATCH v3] soc: tegra: fuse: speedo-tegra210: Update speedo ids

[Aaron Kling]

On Thu, Sep 18, 2025 at 4:45 AM Jon Hunter <jonathanh@xxxxxxxxxx> wrote:
>
>
> On 04/09/2025 02:58, Aaron Kling via B4 Relay wrote:
> > From: Aaron Kling <webgeek1234@xxxxxxxxx>
> >
> > Existing code only sets cpu and gpu speedo ids 0 and 1. The cpu dvfs
> > code supports 11 ids and nouveau supports 5. This aligns with what the
> > downstream vendor kernel supports. Align skus with the downstream list.
>
> Do you have a reference for the downstream kernel change you are
> referring to? I have found this change [0]. However, this does not quite
> align with what you have in this patch.

This is based on L4T r32.7.6 [0], which builds up the list over
several commits, so I can't link to just one. The first revision only
added sku's that I had specifically verified. Mikko suggested to just
import everything from downstream and to simplify the conditionals.
And that's this revision.

>
> Jon
>
> [0]
> https://nv-tegra.nvidia.com/r/plugins/gitiles/linux-5.10/+/2a8660e3d1e4f75ba4390b72991744174237b025%5E%21/#F0
>
> --
> nvpublic
>

Aaron

[0] https://nv-tegra.nvidia.com/r/plugins/gitiles/linux-4.9/+/refs/tags/tegra-l4t-r32.7.6_good/drivers/soc/tegra/fuse/speedo-tegra210.c#72