Re: [PATCH v3 0/8] gpio: renesas: Add support for GPIO and related interrupts in RZ/N1 SoC

[Conor Dooley]

On Thu, Sep 18, 2025 at 12:39:58PM +0200, Herve Codina (Schneider Electric) wrote:
> Hi,
> 
> This series adds support for GPIO and GPIO IRQ mux available in the
> RZ/N1 SoCs.
> 
> The first patches in this series are related to a new helper introduced
> to parse an interrupt-map property.
>   - patch 1: Introduce the helper (for_each_of_imap_item)
>   - patch 2: Add a unittest for the new helper
>   - patch 3 and 4: convert existing drivers to use this new helper
> 
> Patch 4 will conflicts with commit 40c26230a1bf ("irqchip: Use int type
> to store negative error codes") available in linux-next.
> 
> Patch 5 adds support for GPIO (device-tree description)
> 
> The last patches (6, 7 and 8) of the series are related to GPIO
> interrupts and GPIO IRQ multiplexer.
> 
> In the RZ/N1 SoCs, GPIO interrupts are wired to a GPIO IRQ multiplexer.
> 
> This multiplexer does nothing but select 8 GPIO IRQ lines out of the 96
> available to wire them to the GIC input lines.
> 
> One upstreaming attempt have been done previously by Phil Edworthy [1]
> but the series has never been applied.
> 
> Based on my understanding, I have fully reworked the driver proposed by
> Phil and removed the IRQ domain. Indeed, the device doesn't handle
> interrupts. It just routes signals.
> 
> Also, as an interrupt-map property is used, the driver cannot be
> involved as an interrupt controller itself. It is a nexus node.
> 
> With that in mind,
>   - Patch 6 is related to the irq-mux binding.
> 
>   - Patch 7 introduces the irq-mux driver.
>     This driver uses the 'for_each_of_imap_item' helper introduced
>     previously. Indeed, the lines routing is defined by the
>     interrupt-map property and the driver needs to set registers to
>     apply this routing.
> 
>   - Patch 8 is the RZ/N1 device-tree description update to have the
>     support for the GPIO interrupts.
> 
> [1] https://lore.kernel.org/all/20190219155511.28507-1-phil.edworthy@xxxxxxxxxxx/
> 
> Best regards,
> Hervé

This whole thing is super interesting to me. I have a gpio irq mux of my
own with a driver that is massively more complex than what you have here
(it's a full on irqchip driver). I'm definitely gonna have to see if I
can ape what you have done here and simplify what I have.

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