Re: [PATCH] dt-bindings: PCI: qcom,pcie-x1e80100: Set clocks minItems for the fifth Glymur PCIe Controller

[Bjorn Helgaas]

On Fri, Sep 19, 2025 at 07:53:25PM +0530, Pankaj Patil wrote:
> From: Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
> 
> On the Qualcomm Glymur platform, the fifth PCIe host is compatible with
> the DWC controller present on the X1E80100 platform, but does not have
> cnoc_sf_axi clock. Hence, set minItems of clocks and clock-names to six.
> 
> Signed-off-by: Qiang Yu <qiang.yu@xxxxxxxxxxxxxxxx>
> Signed-off-by: Pankaj Patil <pankaj.patil@xxxxxxxxxxxxxxxx>

Applied with Rob's ack to pci/dt-binding for v6.18, thanks!

> ---
>  Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> index 257068a18264..61581ffbfb24 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-x1e80100.yaml
> @@ -32,10 +32,11 @@ properties:
>        - const: mhi # MHI registers
>  
>    clocks:
> -    minItems: 7
> +    minItems: 6
>      maxItems: 7
>  
>    clock-names:
> +    minItems: 6
>      items:
>        - const: aux # Auxiliary clock
>        - const: cfg # Configuration clock
> -- 
> 2.34.1
>