RE: [PATCH v3 1/7] clk: renesas: r9a09g077: Add ADC modules clock

[Cosmin-Gabriel Tanislav]

> -----Original Message-----
> From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx>
> Sent: Wednesday, October 1, 2025 4:36 PM
> To: Cosmin-Gabriel Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> Cc: Jonathan Cameron <jic23@xxxxxxxxxx>; David Lechner <dlechner@xxxxxxxxxxxx>; Nuno Sá
> <nuno.sa@xxxxxxxxxx>; Andy Shevchenko <andy@xxxxxxxxxx>; Rob Herring <robh@xxxxxxxxxx>; Krzysztof
> Kozlowski <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Geert Uytterhoeven
> <geert+renesas@xxxxxxxxx>; magnus.damm <magnus.damm@xxxxxxxxx>; linux-iio@xxxxxxxxxxxxxxx; linux-
> renesas-soc@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx
> Subject: Re: [PATCH v3 1/7] clk: renesas: r9a09g077: Add ADC modules clock
> 
> Hi Cosmin,
> 
> On Wed, 1 Oct 2025 at 14:24, Cosmin Tanislav
> <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx> wrote:
> > Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have three 12bit
> > ADC peripherals, each with its own peripheral clock.
> >
> > For conversion, they use the PCLKL clock.
> >
> > Add their clocks to the list of module clocks.
> >
> > Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@xxxxxxxxxxx>
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> 
> Thanks for your patch!
> 
> As I have already queued v1 in renesas-clk-for-v6.19, there is no
> need to resend it.
> 

Thanks Geert, sorry about that. I'll omit already queued patches from
now on.

> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds