Re: [Patch v7 02/12] perf/x86/intel: Fix NULL event access and potential PEBS record loss

[Oliver Sang]

hi, Dapeng,

On Tue, Sep 30, 2025 at 02:19:25PM +0800, Mi, Dapeng wrote:
> 

[...]

> 
> Oops, it looks previous fix was incomplete. :(
> 
> Oliver, could you please verify the new attached patch (Please apply this
> patch on top of the whole patch series)? Thanks a lot for your effort. 

we confirmed the patch fixed the warning we reported.

Tested-by: kernel test robot <oliver.sang@xxxxxxxxx>

=========================================================================================
compiler/cpufreq_governor/kconfig/option_a/rootfs/tbox_group/test/testcase:
  gcc-12/performance/x86_64-rhel-9.4/Socket Activity/debian-12-x86_64-phoronix/lkp-csl-2sp7/stress-ng-1.11.0/phoronix-test-suite

commit:
  0c9567b36ae6f8 ("perf/x86: Remove redundant is_x86_event() prototype")
  a7138973beb1d1 ("perf/x86/intel: Fix NULL event access and potential PEBS record loss")
  81248d31dd384c ("perf/x86/intel: Add counter group support for arch-PEBS")
  54701e916f6782 ("Fixup: perf/x86/intel: Fix NULL event access waring from test robot")

0c9567b36ae6f83c a7138973beb1d124386472663cf 81248d31dd384c71c3b6a6af25a 54701e916f6782039c2ea8adb4b
---------------- --------------------------- --------------------------- ---------------------------
       fail:runs  %reproduction    fail:runs  %reproduction    fail:runs  %reproduction    fail:runs
           |             |             |             |             |             |             |
           :6          100%           6:6          100%           6:6            0%            :20    dmesg.WARNING:at_arch/x86/events/intel/ds.c:#intel_pmu_drain_pebs_nhm


> 
> diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
> index 65908880f424..3dedf7a0acf6 100644
> --- a/arch/x86/events/intel/ds.c
> +++ b/arch/x86/events/intel/ds.c
> @@ -2781,9 +2781,11 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs
> *iregs, struct perf_sample_d
>  
>          /* PEBS v3 has more accurate status bits */
>          if (x86_pmu.intel_cap.pebs_format >= 3) {
> -            for_each_set_bit(bit, (unsigned long *)&pebs_status, size)
> +            for_each_set_bit(bit, (unsigned long *)&pebs_status, size) {
>                  counts[bit]++;
> -
> +                if (counts[bit] && !events[bit])
> +                    events[bit] = cpuc->events[bit];
> +            }
>              continue;
>          }
>  
> @@ -2821,8 +2823,11 @@ static void intel_pmu_drain_pebs_nhm(struct pt_regs
> *iregs, struct perf_sample_d
>           * If collision happened, the record will be dropped.
>           */
>          if (pebs_status != (1ULL << bit)) {
> -            for_each_set_bit(i, (unsigned long *)&pebs_status, size)
> +            for_each_set_bit(i, (unsigned long *)&pebs_status, size) {
>                  error[i]++;
> +                if (error[i] && !events[i])
> +                    events[i] = cpuc->events[i];
> +            }
>              continue;
>          }
>