Re: [PATCH v4 07/10] phy: qualcomm: qmp-combo: Update QMP PHY with Glymur settings

[Wesley Cheng]

On 10/1/2025 5:58 PM, Dmitry Baryshkov wrote:
> On Wed, Oct 01, 2025 at 03:05:31PM -0700, Wesley Cheng wrote:
> > For SuperSpeed USB to work properly, there is a set of HW settings that
> > need to be programmed into the USB blocks within the QMP PHY.  Ensure that
> > these settings follow the latest settings mentioned in the HW programming
> > guide.  The QMP USB PHY on Glymur is a USB43 based PHY that will have some
> > new ways to define certain registers, such as the replacement of TXA/RXA
> > and TXB/RXB register sets.  This was replaced with the LALB register set.
> >
> > There are also some PHY init updates to modify the PCS MISC register space.
> > Without these, the QMP PHY PLL locking fails.
> >
> > Signed-off-by: Wesley Cheng <wesley.cheng@xxxxxxxxxxxxxxxx>
> > ---
> >   drivers/phy/qualcomm/phy-qcom-qmp-combo.c     | 312 ++++++++-
> >   .../phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h    |  17 +
> >   .../phy/qualcomm/phy-qcom-qmp-pcs-misc-v8.h   |  12 +
> >   .../qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h   | 639 ++++++++++++++++++
> >   .../phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h  |  33 +
> >   .../phy-qcom-qmp-usb43-qserdes-com-v8.h       | 224 ++++++
> >   drivers/phy/qualcomm/phy-qcom-qmp.h           |   4 +
> >   7 files changed, 1240 insertions(+), 1 deletion(-)
> >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-aon-v8.h
> >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-misc-v8.h
> >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-lalb-v8.h
> >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-pcs-v8.h
> >   create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-usb43-qserdes-com-v8.h
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h
> > index da2a7ad2cdcc..7211c71fe68c 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h
> > @@ -32,7 +32,9 @@
> >   #include "phy-qcom-qmp-qserdes-txrx-v7.h"
> >   
> >   #include "phy-qcom-qmp-qserdes-com-v8.h"
> > +#include "phy-qcom-qmp-usb43-qserdes-com-v8.h"
> >   #include "phy-qcom-qmp-qserdes-txrx-v8.h"
> > +#include "phy-qcom-qmp-qserdes-lalb-v8.h"
> >   
> >   #include "phy-qcom-qmp-qserdes-pll.h"
> >   
> > @@ -60,6 +62,8 @@
> >   
> >   #include "phy-qcom-qmp-pcs-v8_50.h"
> >   
> > +#include "phy-qcom-qmp-usb43-pcs-v8.h"
>
> Let's not include USB-specific header into the generic header.

Hi Dmitry,

This is actually referring to the QMP PCS register set for the USB43 
based PHYs.  Even though it is a QMP PHY v8 (ie phy-qcom-qmp-pcs-v8), 
there are some offset differences between the existing one and the one 
being added.  In that case, should we still have it in the USB specific 
QMP combo driver?  I guess it might make sense to have it there, as 
technically the usb43 based phy is only really going to be there for 
USB4 capable cores, and I don't think there's much that is common 
between usb43 and other HW that utilize/share the QMP PHY.

Thanks
Wesley Cheng

> With that fixed:
>
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
>
>
>
> > +
> >   /* QPHY_SW_RESET bit */
> >   #define SW_RESET				BIT(0)
> >   /* QPHY_POWER_DOWN_CONTROL */
> >
> > --
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