Re: [PATCH v10 01/15] x86/cpu: Enumerate the LASS feature bits

[Sohil Mehta]

On 10/7/2025 1:38 PM, Edgecombe, Rick P wrote:
>> One could argue that the LASS hardware enforcement of the kernel data
>> accesses *depends* on SMAP being enabled.
> 
> The fetch part doesn't though?

That's right. The instruction fetches could have depended on SMEP but
the spec explicitly calls out that it does not.

"A supervisor-mode instruction fetch causes a LASS violation if it would
accesses a linear address of which bit 63 is 0. (Unlike paging, this
behavior of LASS applies regardless of the setting of CR4.SMEP.)"