Re: [PATCH 1/6] genirq: platform wide interrupt moderation: Documentation, Kconfig, irq_desc

[Luigi Rizzo]

On Thu, Nov 13, 2025 at 2:25 PM Marc Zyngier <maz@xxxxxxxxxx> wrote:
>
> On Wed, 12 Nov 2025 19:24:03 +0000,
> Luigi Rizzo <lrizzo@xxxxxxxxxx> wrote:
>
> [...]
>
> > The system does not rely on any special hardware feature except from
> > MSI-X Pending Bit Array (PBA), a mandatory component of MSI-X
>
> Is this stuff PCI specific? if so, Why? What is the actual dependency
> on PBA? It is it just that you are relying on the ability to mask
> interrupts without losing them, something that is pretty much a given
> on any architecture?

You are right, I was overly restrictive. I only need what you say,
will replace the text accordingly.

>
> [...]
> > +To understand the motivation for this feature, we start with some
> > +background on interrupt moderation.
>
> This reads like marketing blurb. This is an API documentation, and it
> shouldn't be a description of your motivations for building it the way
> you did. I'd suggest you stick to the API, and keep the motivations
> for the cover letter.

ok will remove it.
Sorry if it reads like marketing, that is very very far from my intentions.
I just wanted to give background information in a way that is easy
to access from the source tree.

>
> > +
> > +* **Interrupt** is a mechanism to **notify** the CPU of **events**
> > +  that should be handled by software, for example, **completions**
> > +  of I/O requests (network tx/rx, disk read/writes...).
>
> That's only half of the truth, as this description only applies to
> *edge* interrupts. Level interrupts report a change in *state*, not an
> event.
>
> How do you plan to deal with interrupt moderation for level
> interrupts?

I don't. This is restricted to edge interrupts.

cheers
luigi